SEM image of ultra-thin CNF-MIM capacitors

Capacitors

Smoltek has devel­oped a pro­to­type of the thinnest dis­crete capac­i­tor in the world. Its total build­ing height is less than 40 microm­e­ters (38.2 µm to be exact). You have to stack a bunch of them on top of each oth­er to reach the same height as today’s indus­try-stan­dard regard­ing sur­face-mount­ed dis­crete capac­i­tors. The capac­i­tor, with­out encap­su­la­tion and sub­strate, is mere­ly 0.5 to 10 µm in height. It can be built direct­ly onto an inte­grat­ed circuit’s die or built into its interposer.

The most amaz­ing thing about this micro­scop­ic capac­i­tor is its per­for­mance. One square mil­lime­ter has a capac­i­tance of a whop­ping 650 nano­farads (650 nF/​mm2). Its inter­nal resis­tance (ESR) is less than forty mil­liohms (40 mΩ), and its inter­nal induc­tance (ESL) is below fif­teen pico­hen­ry (15 pH).

We describe our capac­i­tor as a CNF-MIM capac­i­tor since it is a met­al-insu­la­tor-met­al (MIM) capac­i­tor where car­bon nanofibers (CNF) are used to cre­ate a much larg­er sur­face area, hence high­er capac­i­tance than the form fac­tor suggests.

SEM-image of the CNF-MIM pro­to­type that is only 38.2 microns thick

Ultra-thin decoupling capacitors

We are devel­op­ing ultra-thin and high-per­for­mance nanofiber-based capac­i­tors for mobile appli­ca­tion proces­sors. The dri­ving volt­age decreas­es in today’s proces­sors because more and more tran­sis­tors can fit on a giv­en sur­face. The low­er dri­ve volt­age makes the proces­sors increas­ing­ly sen­si­tive to inter­fer­ence, and a num­ber of so-called decou­pling capac­i­tors are required to sta­bi­lize the pow­er supply.

To increase per­for­mance and reduce pow­er con­sump­tion, these capac­i­tors must be placed as close to the proces­sor chip as pos­si­ble. For the capac­i­tors to be placed as close to the proces­sor chip as pos­si­ble, they must be extreme­ly thin. They must also be high-per­for­mance, i.e. sta­ble at high fre­quen­cies and with low inter­nal losses.

Our car­bon nan­otech­nol­o­gy makes it pos­si­ble to man­u­fac­ture capac­i­tors with a unique com­bi­na­tion of supe­ri­or elec­tri­cal per­for­mance at very high fre­quen­cies and an extreme­ly small form factor—ultra-thin capacitors.

Smoltek’s upcom­ing prod­uct fam­i­ly for decou­pling capac­i­tors for the semi­con­duc­tor indus­try is intend­ed to be placed in the appli­ca­tion proces­sor chip.

Chip with capacitors placed on the underside
The decou­pling capac­i­tors are locat­ed on the under­side of the appli­ca­tion proces­sor chip

Technical data—CNF-MIM capacitor technology

  • Sol­id-state construction
  • Capac­i­tance den­si­ty: > 650 nF/​mm2
  • Equiv­a­lent series resis­tance (ESR): < 40 mΩ
  • Equiv­a­lent series induc­tance (ESL): < 15 pH
  • Break­down volt­age: Up to ~ 25 V
  • Leak­age cur­rent: ~ 4 mA/​F
  • Excel­lent capac­i­tance sta­bil­i­ty up to 150 °C

Applications for discrete CNF-MIM capacitors

A dis­crete CNF-MIM capac­i­tor has a small­er foot­print (area) and much thin­ner pro­file (z‑dimension) than any oth­er capac­i­tor with the same capac­i­tance. CNF-MIM capac­i­tors up to more than 650 nF can be made less than 40 µm in height. The actu­al form fac­tor can be var­ied accord­ing to the design and need.

As shown in the illus­tra­tions, a dis­crete CNF-MIM capac­i­tor can be

  • mount­ed on print­ed cir­cuit board (PCB)
  • embed­ded in PCB
  • mount­ed on chip interposer
  • embed­ded in chip interposer
  • mount­ed on chip die
  • Dis­crete CNF-MIM capac­i­tors are com­pat­i­ble with wafer-to-wafer (W2W) or die-to-wafer bond­ing (D2W).

Applications for integrated CNF-MIM capacitors

A CNF-MIM capac­i­tor can also be inte­grat­ed direct­ly into chip die or chip inter­pos­er. The height of the inte­grat­ed capac­i­tors is a mere 0.5 to 10 µm. The ben­e­fits of inte­grat­ed CNF-MIM are many:

  • CMOS-com­pat­i­ble man­u­fac­tur­ing process
  • Unpar­al­leled design free­dom for cir­cuit designers
  • Pos­si­ble to man­u­fac­ture direct­ly on-chip
  • Clos­er to the cir­cuit where it is needed
  • Extreme­ly small 2D footprint
  • Very com­pact 3D volume
  • Elim­i­nates the need for inte­grat­ed dis­crete capacitors

As shown in the illus­tra­tions, a CNF-MIM capac­i­tor can be

  • inte­grat­ed with chip interposer
  • inte­grat­ed with built-on-chip die

Discrete CNF-MIM capacitor compared to alternatives

Mul­ti­lay­er Ceram­ic Capac­i­tors (MLCC) form the indus­try stan­dard for sur­face-mount­ed device (SMD) capac­i­tors. Every year, tril­lions of MLCCs are built into elec­tron­ic devices. They are 300 µm high. CNF-MIM offers the same capac­i­tance at a tenth of that height.

The minia­tur­iza­tion of elec­tron­ics is cre­at­ing a grow­ing need for ever-small­er capac­i­tors. And some cir­cuits (such as Apple’s) use capac­i­tors that are state of the art. These use improve­ments of MLCC and Low Induc­tance Chip Capac­i­tors (LICCs) and Trench Sil­i­con Capac­i­tors (TSCs), all of which have a height of 80–100 µm.

How­ev­er, MLCC, LICC, and TSC strug­gle to go down in height due to mate­ri­als involved, pro­cess­ing schemes, and the cost of raw mate­ri­als and pro­cess­ing. At the same time, SiP and SoC con­tin­ue to become more com­pact. There is less and less space between inter­con­nects (bumps), and they are get­ting short­er. To fit capac­i­tors between the bumps, the capac­i­tors must have a small­er foot­print and, above all, be shorter—preferably less than 20 µm.

This is the prob­lem that CNF-MIM capac­i­tors solve. They have a much small­er foot­print and, above all, a much low­er height.

How to make the world’s thinnest capacitor

To cre­ate a capac­i­tor with a min­i­mal foot­print and height, we use car­bon nanofibers (CNFs) to mul­ti­ply the con­tact area between the two met­als and the inter­me­di­ary dielectric.

Con­sid­er a sin­gle CNF with a diam­e­ter of 10 nm and a length of 5 µm. Its man­tle sur­face is 2,000 times larg­er than the area it occu­pies. Thus, a for­est of such CNFs would mul­ti­ply the sur­face, but not by as much as 2,000. We can’t cov­er the entire orig­i­nal sur­face with CNFs; there must be space between them to allow access to the con­tact sur­face. But if the for­est of CNFs cov­ers about half the sur­face, then the sur­face mul­ti­pli­ca­tion would be in the range of 1,000 times.

Car­bon nanofiber met­al-insu­la­tor-met­al capacitor.

CNF has many metal­lic prop­er­ties, includ­ing being a good con­duc­tor of cur­rent. There­fore a met­al plate cov­ered to fifty per­cent by CNFs is a sin­gle elec­trode with a sur­face area about 1,000 times larg­er than the area of the met­al plate itself. A MIM capac­i­tor is obtained by coat­ing this elec­trode with a uni­form­ly thick lay­er of a dielec­tric and then coat­ing this in turn with a met­al. Of course, the dielec­tric should have a high rel­a­tive per­mit­tiv­i­ty to max­i­mize the capacitance.

Since the CNF has a length much larg­er than the diam­e­ter, we can neglect what hap­pens to the elec­tric field near the base and top of each CNF. Essen­tial­ly it will be a uni­form field, just as in a par­al­lel plate capacitor.

Since the capac­i­tance of a par­al­lel plate capac­i­tor is direct­ly pro­por­tion­al to the sur­face area, we con­clude that CNFs have increased the capac­i­tance den­si­ty by 1,000 times.

But it doesn’t end there. If the sec­ond lay­er of met­al is made uni­form­ly thick, both sides of it will have the same shape as the first elec­trode. So anoth­er MIM capac­i­tor is obtained by coat­ing it with anoth­er dielec­tric lay­er and then coat­ing it with met­al. It will have the same capac­i­ty as the first. And by elec­tri­cal­ly con­nect­ing the first and the third met­al lay­er, we achieve a par­al­lel con­nec­tion, which dou­bles the capac­i­tance. This can be repeat­ed as long as desired, and there is space between the car­bon nanofibers. The last lay­er of met­al does not need to be uni­form­ly thick but can fill any remain­ing spaces between the car­bon nanofibers.