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Smoltek has develÂoped a proÂtoÂtype of the thinnest disÂcrete capacÂiÂtor in the world. Its total buildÂing height is less than 40 micromÂeÂters (38.2 µm to be exact). You have to stack a bunch of them on top of each othÂer to reach the same height as today’s indusÂtry-stanÂdard regardÂing surÂface-mountÂed disÂcrete capacÂiÂtors. The capacÂiÂtor, withÂout encapÂsuÂlaÂtion and subÂstrate, is mereÂly 0.5 to 10 µm in height. It can be built directÂly onto an inteÂgratÂed circuit’s die or built into its interposer.
The most amazÂing thing about this microÂscopÂic capacÂiÂtor is its perÂforÂmance. One square milÂlimeÂter has a capacÂiÂtance of a whopÂping 650 nanoÂfarads (650 nF/​mm2). Its interÂnal resisÂtance (ESR) is less than forty milÂliohms (40 mΩ), and its interÂnal inducÂtance (ESL) is below fifÂteen picoÂhenÂry (15 pH).
We describe our capacÂiÂtor as a CNF-MIM capacÂiÂtor since it is a metÂal-insuÂlaÂtor-metÂal (MIM) capacÂiÂtor where carÂbon nanofibers (CNF) are used to creÂate a much largÂer surÂface area, hence highÂer capacÂiÂtance than the form facÂtor suggests.
We are develÂopÂing ultra-thin and high-perÂforÂmance nanofiber-based capacÂiÂtors for mobile appliÂcaÂtion procesÂsors. The driÂving voltÂage decreasÂes in today’s procesÂsors because more and more tranÂsisÂtors can fit on a givÂen surÂface. The lowÂer driÂve voltÂage makes the procesÂsors increasÂingÂly senÂsiÂtive to interÂferÂence, and a numÂber of so-called decouÂpling capacÂiÂtors are required to staÂbiÂlize the powÂer supply.
To increase perÂforÂmance and reduce powÂer conÂsumpÂtion, these capacÂiÂtors must be placed as close to the procesÂsor chip as posÂsiÂble. For the capacÂiÂtors to be placed as close to the procesÂsor chip as posÂsiÂble, they must be extremeÂly thin. They must also be high-perÂforÂmance, i.e. staÂble at high freÂquenÂcies and with low interÂnal losses.
Our carÂbon nanÂotechÂnolÂoÂgy makes it posÂsiÂble to manÂuÂfacÂture capacÂiÂtors with a unique comÂbiÂnaÂtion of supeÂriÂor elecÂtriÂcal perÂforÂmance at very high freÂquenÂcies and an extremeÂly small form factor—ultra-thin capacitors.
Smoltek’s upcomÂing prodÂuct famÂiÂly for decouÂpling capacÂiÂtors for the semiÂconÂducÂtor indusÂtry is intendÂed to be placed in the appliÂcaÂtion procesÂsor chip.
A disÂcrete CNF-MIM capacÂiÂtor has a smallÂer footÂprint (area) and much thinÂner proÂfile (z‑dimension) than any othÂer capacÂiÂtor with the same capacÂiÂtance. CNF-MIM capacÂiÂtors up to more than 650 nF can be made less than 40 µm in height. The actuÂal form facÂtor can be varÂied accordÂing to the design and need.
As shown in the illusÂtraÂtions, a disÂcrete CNF-MIM capacÂiÂtor can be
A CNF-MIM capacÂiÂtor can also be inteÂgratÂed directÂly into chip die or chip interÂposÂer. The height of the inteÂgratÂed capacÂiÂtors is a mere 0.5 to 10 µm. The benÂeÂfits of inteÂgratÂed CNF-MIM are many:
As shown in the illusÂtraÂtions, a CNF-MIM capacÂiÂtor can be
MulÂtiÂlayÂer CeramÂic CapacÂiÂtors (MLCC) form the indusÂtry stanÂdard for surÂface-mountÂed device (SMD) capacÂiÂtors. Every year, trilÂlions of MLCCs are built into elecÂtronÂic devices. They are 300 µm high. CNF-MIM offers the same capacÂiÂtance at a tenth of that height.
The miniaÂturÂizaÂtion of elecÂtronÂics is creÂatÂing a growÂing need for ever-smallÂer capacÂiÂtors. And some cirÂcuits (such as Apple’s) use capacÂiÂtors that are state of the art. These use improveÂments of MLCC and Low InducÂtance Chip CapacÂiÂtors (LICCs) and Trench SilÂiÂcon CapacÂiÂtors (TSCs), all of which have a height of 80–100 µm.
HowÂevÂer, MLCC, LICC, and TSC strugÂgle to go down in height due to mateÂriÂals involved, proÂcessÂing schemes, and the cost of raw mateÂriÂals and proÂcessÂing. At the same time, SiP and SoC conÂtinÂue to become more comÂpact. There is less and less space between interÂconÂnects (bumps), and they are getÂting shortÂer. To fit capacÂiÂtors between the bumps, the capacÂiÂtors must have a smallÂer footÂprint and, above all, be shorter—preferably less than 20 µm.
This is the probÂlem that CNF-MIM capacÂiÂtors solve. They have a much smallÂer footÂprint and, above all, a much lowÂer height.
To creÂate a capacÂiÂtor with a minÂiÂmal footÂprint and height, we use carÂbon nanofibers (CNFs) to mulÂtiÂply the conÂtact area between the two metÂals and the interÂmeÂdiÂary dielectric.
ConÂsidÂer a sinÂgle CNF with a diamÂeÂter of 10 nm and a length of 5 µm. Its manÂtle surÂface is 2,000 times largÂer than the area it occuÂpies. Thus, a forÂest of such CNFs would mulÂtiÂply the surÂface, but not by as much as 2,000. We can’t covÂer the entire origÂiÂnal surÂface with CNFs; there must be space between them to allow access to the conÂtact surÂface. But if the forÂest of CNFs covÂers about half the surÂface, then the surÂface mulÂtiÂpliÂcaÂtion would be in the range of 1,000 times.
CNF has many metalÂlic propÂerÂties, includÂing being a good conÂducÂtor of curÂrent. ThereÂfore a metÂal plate covÂered to fifty perÂcent by CNFs is a sinÂgle elecÂtrode with a surÂface area about 1,000 times largÂer than the area of the metÂal plate itself. A MIM capacÂiÂtor is obtained by coatÂing this elecÂtrode with a uniÂformÂly thick layÂer of a dielecÂtric and then coatÂing this in turn with a metÂal. Of course, the dielecÂtric should have a high relÂaÂtive perÂmitÂtivÂiÂty to maxÂiÂmize the capacitance.
Since the CNF has a length much largÂer than the diamÂeÂter, we can neglect what hapÂpens to the elecÂtric field near the base and top of each CNF. EssenÂtialÂly it will be a uniÂform field, just as in a parÂalÂlel plate capacitor.
Since the capacÂiÂtance of a parÂalÂlel plate capacÂiÂtor is directÂly proÂporÂtionÂal to the surÂface area, we conÂclude that CNFs have increased the capacÂiÂtance denÂsiÂty by 1,000 times.
But it doesn’t end there. If the secÂond layÂer of metÂal is made uniÂformÂly thick, both sides of it will have the same shape as the first elecÂtrode. So anothÂer MIM capacÂiÂtor is obtained by coatÂing it with anothÂer dielecÂtric layÂer and then coatÂing it with metÂal. It will have the same capacÂiÂty as the first. And by elecÂtriÂcalÂly conÂnectÂing the first and the third metÂal layÂer, we achieve a parÂalÂlel conÂnecÂtion, which douÂbles the capacÂiÂtance. This can be repeatÂed as long as desired, and there is space between the carÂbon nanofibers. The last layÂer of metÂal does not need to be uniÂformÂly thick but can fill any remainÂing spaces between the carÂbon nanofibers.
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