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Compatibility Assessment of CVD growth of Carbon nanofibers on bulkCMOS devices

Research paper pub­lished in Nano Let­ters 2008, Vol­ume 8, Issue 8, pp. 2437–2441, July 18, 2008.

We com­pare the lev­el of dete­ri­o­ra­tion in the basic func­tion­al­i­ty of indi­vid­ual tran­sis­tors on ASIC chips fab­ri­cat­ed in stan­dard 130 nm bulk CMOS tech­nol­o­gy when sub­ject­ed to three dis­parate CVD tech­niques with rel­a­tive­ly low pro­cess­ing tem­per­a­ture to grow car­bon nanos­truc­tures. We report that the growth tech­nique with the low­est tem­per­a­ture has the least impact on the tran­sis­tor behavior.

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