Integrated circuit comprising nanostructures

The present inven­tion pro­vides for nanos­truc­tures grown on a con­duct­ing sub­strate, and a method of mak­ing the same. The nanos­truc­tures grown accord­ing to the claimed method are suit­able for inter­con­nects and heat dis­si­pa­tors in elec­tron­ic devices.

Granted patents relating to the innovation

Patent OfficePatent
Chi­naCN101189372
Chi­naCN102709132
Chi­naCN105575743
EuropeEP2587514
Rus­siaRU2406689
For more infor­ma­tion about a par­tic­u­lar patent, click on its name to view it on Google Patents.

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Integrated circuits having interconnects and heat dissipators based on nanostructures

The present invention relates to a heat dissipator that includes a conductive substrate and a plurality of nanostructures supported by the conductive substrate. The nanostructures are at least partly embedded in an insulator. Each of the nanostructures includes a plurality of intermediate layers on the conductive substrate. At least two of the plurality of intermediate layers are interdiffused, and material of the at least two of the plurality of intermediate layers that are interdiffused is present in the nanostructure.

Assembly platform

The invention: An assembly platform for arrangement as an interposer device between an integrated circuit and a substrate to interconnect the integrated circuit and the substrate through the assembly platform, the assembly platform comprising: an assembly substrate; a plurality of conducting vias extending through the assembly substrate; at least one nanostructure connection bump on a first side of the assembly substrate, the nanostructure connection bump being conductively connected to the vias and defining connection locations for connection with at least one of the integrated circuit and the substrate, wherein each of the nanostructure connection bumps comprises: a plurality of elongated conductive nanostructures vertically grown on the first side of the assembly substrate, wherein the plurality of elongated nanostructures are embedded in a metal for the connection with at least one of the integrated circuit and the substrate, at least one connection bump on a second side of the assembly substrate, the second side being opposite to the first side, the connection bump being conductively connected to the vias and defining connection locations for connection with at least one of the integrated circuit and the substrate.

Smoltek patent No. 69 now granted

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