On-Chip Integrated Solid-State Micro-Supercapacitor

Fol­low­ing the trend of elec­tron­ic device mini­atur­iz­a­tion, on-chip integ­rated sol­id-state micro-super­cap­cait­ors (MS) were fab­ric­ated based on ver­tic­ally aligned car­bon nan­ofibers (VACN­Fs) as elec­trode mater­i­als and poly­mer­ic gel elec­tro­lyte as the sol­id elec­tro­lyte. The VACN­Fs were grown at 390 °C and 550 °C tem­per­at­ure on inter­di­git­ated micro-pat­terns, where the dimen­sions of the digits were kept the same but the gap between the digits var­ied from 10–100 μm. A max­im­um capa­cit­ance of 1 mF/​cm² and 0.53mF/cm² (com­bined foot­print area of digits and gaps) were meas­ured for devices with CNFs grown at 390 °C and 20 μm gap, for 550 °C and 10 μm gap, respect­ively. These capa­cit­ances are an order of mag­nitude high­er than the one for sol­id dielec­tric based sil­ic­on trenches capa­cit­ors. The low tem­per­at­ure MS show an inverse capa­cit­ance rela­tion with the gap size where­as high tem­per­at­ure shows ran­dom beha­vi­or. High char­ac­ter­ist­ic fre­quen­cies at 45° phase angle are 114 Hz for 100 μm gap and 142 Hz 30 μm gap for 390 °C and 550 °C tem­per­at­ures. A mod­el for the inter­di­git­ated capa­cit­ors was developed and the res­ults showed that by elim­in­at­ing the cur­rent col­lect­or res­ist­ances the char­ac­ter­ist­ic fre­quen­cies can be increased to 965 Hz and 866 Hz from 67 Hz and 127 Hz for 10 μm gap pat­terns for 390 °C and 550 °C tem­per­at­ures. The entire fab­ric­a­tion was done using CMOS com­pat­ible pro­cesses thus enabling integ­ra­tion dir­ectly on act­ive CMOS chip.