Author: A M Saleem

Template and method of making high aspect ratio template for lithography and use of the template for perforating a substrate at nanoscale

Template and method of making high aspect ratio template for lithography and use of the template for perforating a substrate at nanoscale

Tem­plate and method of mak­ing high aspect ratio tem­plate, stamp, and imprint­ing at nanoscale using nanos­truc­tures for the pur­pose of lith­o­g­ra­phy, and to the use of the tem­plate to cre­ate per­fo­ra­tions on mate­ri­als and products.

Deposition and selective removal of conducting helplayer for nanostructure processing

Deposition and selective removal of conducting helplayer for nanostructure processing

A method for mak­ing one or more nanos­truc­tures is dis­closed, the method com­pris­ing: deposit­ing a con­duct­ing lay­er on an upper sur­face of a sub­strate; deposit­ing a pat­terned lay­er of cat­a­lyst on the con­duct­ing lay­er; grow­ing the one or more nanos­truc­tures on the lay­er of cat­a­lyst; and selec­tive­ly remov­ing the con­duct­ing lay­er between and around the one or more nanos­truc­tures. A device is also dis­closed, com­pris­ing a sub­strate, where­in the sub­strate com­pris­es one or more exposed met­al islands sep­a­rat­ed by one or more insu­lat­ing areas; a con­duct­ing helplay­er dis­posed on the sub­strate cov­er­ing at least some of the one or more exposed met­al islands or insu­lat­ing areas; a cat­a­lyst lay­er dis­posed on the con­duct­ing helplay­er; and one or more nanos­truc­tures dis­posed on the cat­a­lyst layer.

Integrated circuits having interconnects and heat dissipators based on nanostructures

Integrated circuits having interconnects and heat dissipators based on nanostructures

The present inven­tion relates to a heat dis­si­pa­tor that includes a con­duc­tive sub­strate and a plu­ral­i­ty of nanos­truc­tures sup­port­ed by the con­duc­tive sub­strate. The nanos­truc­tures are at least part­ly embed­ded in an insu­la­tor. Each of the nanos­truc­tures includes a plu­ral­i­ty of inter­me­di­ate lay­ers on the con­duc­tive sub­strate. At least two of the plu­ral­i­ty of inter­me­di­ate lay­ers are inter­dif­fused, and mate­r­i­al of the at least two of the plu­ral­i­ty of inter­me­di­ate lay­ers that are inter­dif­fused is present in the nanostructure.

Controlled growth of a nanostructure on a substrate, and electron emission devices based on the same

Controlled growth of a nanostructure on a substrate, and electron emission devices based on the same

The present inven­tion pro­vides a method for nanos­truc­tures grown on a met­al under­lay­er, and a method of mak­ing the same. The grown nanos­truc­tures based on the claimed method are suit­able for man­u­fac­tur­ing elec­tron­ic devices such as an elec­tron beam writer, and a field emis­sion display.