Author: S Krause

Smoltek’s IP strategy explained

Smoltek’s IP strategy explained

Smoltek’s busi­ness mod­el and IP strat­e­gy for the com­pa­ny’s exten­sive patent port­fo­lio have shift­ed over the years – from sci­en­tif­ic curios­i­ty in the begin­ning into solv­ing advanced indus­try needs today. In this video, pub­lished in Novem­ber 2020, Dr Shafiq Kabir, Co-founder and for­mer Chief Inno­va­tion Offi­cer (CIO) explains how the IP-strat­e­gy has trans­formed as the com­pa­ny has evolved. 

Compact Energy Storage Interposer

Compact Energy Storage Interposer

The inven­tion: An inter­pos­er device com­pris­ing a first con­duc­tor pat­tern on a first side defin­ing a por­tion of the inter­pos­er device to be cov­ered by a first elec­tri­cal cir­cuit ele­ment; and a sec­ond con­duc­tor pat­tern on a sec­ond side to be con­nect­ed to a sec­ond elec­tri­cal cir­cuit ele­ment. The sec­ond con­duc­tor pat­tern is elec­tri­cal­ly cou­pled to the first con­duc­tor pat­tern. The inter­pos­er device fur­ther com­pris­es a plu­ral­i­ty of nanos­truc­ture ener­gy stor­age devices arranged with­in the por­tion of the inter­pos­er device to be cov­ered by the first elec­tri­cal cir­cuit ele­ment. Each of the nanos­truc­ture ener­gy stor­age devices com­pris­es at least a first plu­ral­i­ty of con­duc­tive nanos­truc­tures; a con­duc­tion con­trol­ling mate­r­i­al embed­ding the nanos­truc­tures; a first elec­trode con­nect­ed to each nanos­truc­ture in the first plu­ral­i­ty of nanos­truc­tures; and a sec­ond elec­trode sep­a­rat­ed from each nanos­truc­ture in the first plu­ral­i­ty of nanos­truc­tures by the con­duc­tion con­trol­ling material.

Breaking barriers: The future

Breaking barriers: The future

This is the third and last arti­cle in a series of three in which Smoltek founder and strate­gic advi­sor Shafiq Kabir share his per­son­al thoughts on nan­otech­nol­o­gy oppor­tu­ni­ties. In the pre­vi­ous two arti­cles, he has addressed both the hype and the real­i­ty of car­bon nan­otech­nol­o­gy. In this last arti­cle, he looks into the future. He dis­cuss­es how car­bon nan­otech­nol­o­gy will unleash the pow­er of the inter­net of everything.

Breaking barriers: The reality

Breaking barriers: The reality

This is the sec­ond arti­cle in a series of three in which Smoltek founder and strate­gic advi­sor Shafiq Kabir share his per­son­al thoughts on nan­otech­nol­o­gy oppor­tu­ni­ties. In the last arti­cle, he addressed the hype sur­round­ing car­bon nan­otech­nol­o­gy. In this one, he takes you into the real­i­ty of the nan­otech­nol­o­gy entre­pre­neur. He tells you about real chal­lenges that await break­throughs that car­bon nan­otech­nol­o­gy can help with­in the near future.

Assembly platform

Assembly platform

The inven­tion: An assem­bly plat­form for arrange­ment as an inter­pos­er device between an inte­grat­ed cir­cuit and a sub­strate to inter­con­nect the inte­grat­ed cir­cuit and the sub­strate through the assem­bly plat­form, the assem­bly plat­form com­pris­ing: an assem­bly sub­strate; a plu­ral­i­ty of con­duct­ing vias extend­ing through the assem­bly sub­strate; at least one nanos­truc­ture con­nec­tion bump on a first side of the assem­bly sub­strate, the nanos­truc­ture con­nec­tion bump being con­duc­tive­ly con­nect­ed to the vias and defin­ing con­nec­tion loca­tions for con­nec­tion with at least one of the inte­grat­ed cir­cuit and the sub­strate, where­in each of the nanos­truc­ture con­nec­tion bumps com­pris­es: a plu­ral­i­ty of elon­gat­ed con­duc­tive nanos­truc­tures ver­ti­cal­ly grown on the first side of the assem­bly sub­strate, where­in the plu­ral­i­ty of elon­gat­ed nanos­truc­tures are embed­ded in a met­al for the con­nec­tion with at least one of the inte­grat­ed cir­cuit and the sub­strate, at least one con­nec­tion bump on a sec­ond side of the assem­bly sub­strate, the sec­ond side being oppo­site to the first side, the con­nec­tion bump being con­duc­tive­ly con­nect­ed to the vias and defin­ing con­nec­tion loca­tions for con­nec­tion with at least one of the inte­grat­ed cir­cuit and the substrate.

Interposer

Interposer

The inven­tion: An inter­pos­er device com­pris­ing an inter­pos­er sub­strate; a plu­ral­i­ty of con­duct­ing vias extend­ing through the inter­pos­er sub­strate; a con­duc­tor pat­tern on the inter­pos­er sub­strate, and a nanos­truc­ture ener­gy stor­age device. The nanos­truc­ture ener­gy stor­age device com­pris­es at least a first plu­ral­i­ty of con­duc­tive nanos­truc­tures formed on the inter­pos­er sub­strate; a con­duc­tion con­trol­ling mate­r­i­al embed­ding each nanos­truc­ture in the first plu­ral­i­ty of con­duc­tive nanos­truc­tures; a first elec­trode con­nect­ed to each nanos­truc­ture in the first plu­ral­i­ty of nanos­truc­tures; and a sec­ond elec­trode sep­a­rat­ed from each nanos­truc­ture in the first plu­ral­i­ty of nanos­truc­tures by the con­duc­tion con­trol­ling mate­r­i­al, where­in the first elec­trode and the sec­ond elec­trode are con­fig­ured to allow elec­tri­cal con­nec­tion of the nanos­truc­ture ener­gy stor­age device to the inte­grat­ed circuit.

Nanostructure device and method for manufacturing nanostructures

Nanostructure device and method for manufacturing nanostructures

A method for man­u­fac­tur­ing a plu­ral­i­ty of nanos­truc­tures on a sub­strate. The method com­pris­es the steps of: deposit­ing a bot­tom lay­er on an upper sur­face of the sub­strate, the bot­tom lay­er com­pris­ing grains hav­ing a first aver­age grain size; deposit­ing a cat­a­lyst lay­er on an upper sur­face of the bot­tom lay­er, the cat­a­lyst lay­er com­pris­ing grains hav­ing a sec­ond aver­age grain size dif­fer­ent from the first aver­age grain size, there­by form­ing a stack of lay­ers com­pris­ing the bot­tom lay­er and the cat­a­lyst lay­er; heat­ing the stack of lay­ers to a tem­per­a­ture where nanos­truc­tures can form; and pro­vid­ing a gas com­pris­ing a reac­tant such that the reac­tant comes into con­tact with the cat­a­lyst layer.