Flip chip interconnects based on carbon nanofibers-solder composites
Research paper published in the proceedings of 2021 IEEE 71st Electronic Components and Technology Conference (ECTC), 2021, pp. 2229–2234.
Author: E Passalacqua
Reliability, solderability and electrical performance of high density ultra thin capacitors based on carbon nanofibers
Research paper published in the proceedings of 2021 IEEE 71st Electronic Components and Technology Conference (ECTC), 2021, pp. 1627–1632.
High-frequency electrical circuit model for integrated capacitors utilizing lossy nanostructures
Research paper published in the proceedings of 2021 IEEE 71st Electronic Components and Technology Conference (ECTC), 2021, pp. 1205–1210.
Integrated and Discrete Capacitors Based on Carbon Nanostructures with Capacitance Densities in Excess of 350 nF/mm2
Research paper published in the proceedings of 2nd PCNS Passive Components Networking Symposium, Bucharest, Romania, 10–13 September, 2019.
Ultrathin High-Density Capacitors based on Carbon Nanofibers Fabricated on Silicon, Alumina and Glass Interposer Materials
Research paper published in the proceedings of 2020 IEEE 20th International Conference on Nanotechnology (IEEE-NANO), 2020, pp. 213–216.
Integrated fully solid-state capacitor based on carbon nanofibers and dielectrics
Research paper published in the proceedings of 2018 IEEE 68th Electronic Components and Technology Conference (ECTC), 2018, pp. 2313–2318.
Robustness of carbon nanofiber-based MIM capacitors with ultra-high capacitance density to electrical and thermal stress
Research paper published in the proceedings of 2020 IEEE 70th Electronic Components and Technology Conference (ECTC), 2020, pp. 2139–2144.
Integrated and Discrete Ultra-Thin Capacitors Based on Carbon Nanofibers with High Capacitance Density
Research paper published in the proceedings of 2020 IEEE 70th Electronic Components and Technology Conference (ECTC), 2020, pp. 1614–1619.
Ultra-Thin Capacitors based on Carbon nanofibers with Ultra-High Capacitance Density
Research paper published in the proceedings of 2019 Electrical Design of Advanced Packaging and Systems (EDAPS), 2019, pp. 1–3.
Fully Solid-State Integrated Capacitors Based on Carbon Nanofibers and Dielectrics with Specific Capacitances Higher Than 200 nF/mm2
Research paper published in the proceedings of 2019 IEEE 69th Electronic Components and Technology Conference (ECTC), 2019, pp. 1870–1876.
Compact Energy Storage Interposer
The invention: An interposer device comprising a first conductor pattern on a first side defining a portion of the interposer device to be covered by a first electrical circuit element; and a second conductor pattern on a second side to be connected to a second electrical circuit element. The second conductor pattern is electrically coupled to the first conductor pattern. The interposer device further comprises a plurality of nanostructure energy storage devices arranged within the portion of the interposer device to be covered by the first electrical circuit element. Each of the nanostructure energy storage devices comprises at least a first plurality of conductive nanostructures; a conduction controlling material embedding the nanostructures; a first electrode connected to each nanostructure in the first plurality of nanostructures; and a second electrode separated from each nanostructure in the first plurality of nanostructures by the conduction controlling material.
On-chip solid-state CMOS compatible micro-supercapacitors
Research paper published in the proceedings of 2018 IEEE 68th Electronic Components and Technology Conference (ECTC), 2018, pp. 1382–1388.
Direct Electrical and Mechanical Characterization of Carbon Nanofibers Turf Using a Probe Card and Nanoindentation
Research paper published in the proceedings of 2018 IEEE 13th Nanotechnology Materials and Devices Conference (NMDC), 2018, pp. 1–4.
Nanoparticles-enabled low temperature growth of carbon nanofibers and their properties for supercapacitors
Research paper published in Advanced Materials Letters, 2018, Volume 9, Issue 6, pp. 444–449.
This is Smoltek
What are carbon nanofibers? How can they be used in the semiconductor industry? What is the role of Smoltek? The answers are given in this short, informative video.
Integrated on-chip solid state capacitor based on vertically aligned nanofibers, grown using a CMOS temperature compatible process
Research paper published in Solid–State Electronics, Volume 139, January 2018, pp. 75–79.
On-Chip Integrated Solid-State Micro-Supercapacitor
Research paper published in the proceedings of 2017 IEEE 67th Electronic Components and Technology Conference (ECTC), 2017, pp. 173–178.
Integrated solid-state capacitors based on carbon nanostructures
Article published in Chip Scale Review, Jul–Aug, 2017, pp. 38–40.
Coin-cell Supercapacitors Based on CVD Grown and Vertically Aligned Carbon Nanofibers (VACNFs)
Research paper published in International Journal of Electrochemical Science, 2017, Volume 12, Issue 7, pp. 6653–6661.
Assembly platform
The invention: An assembly platform for arrangement as an interposer device between an integrated circuit and a substrate to interconnect the integrated circuit and the substrate through the assembly platform, the assembly platform comprising: an assembly substrate; a plurality of conducting vias extending through the assembly substrate; at least one nanostructure connection bump on a first side of the assembly substrate, the nanostructure connection bump being conductively connected to the vias and defining connection locations for connection with at least one of the integrated circuit and the substrate, wherein each of the nanostructure connection bumps comprises: a plurality of elongated conductive nanostructures vertically grown on the first side of the assembly substrate, wherein the plurality of elongated nanostructures are embedded in a metal for the connection with at least one of the integrated circuit and the substrate, at least one connection bump on a second side of the assembly substrate, the second side being opposite to the first side, the connection bump being conductively connected to the vias and defining connection locations for connection with at least one of the integrated circuit and the substrate.